An Open Chip Ran a 7B Model on the CPU Alone. RISC-V's 25 Percent Moment Has an Asterisk.

On the summit floor this year, a company called DeepComputing did something that reads like a stunt and is closer to a statement of intent. It took a Framework Laptop 13, swapped in a mainboard built entirely around an open, royalty-free chip, and ran a 7-billion-parameter DeepSeek model on it live^[1]. No cloud. No GPU. The board even had a dedicated AI accelerator sitting right there on the chip, but they ignored it. They ran the model on the general-purpose cores alone just to show they could. The speed was not going to worry a data center, but that was never the pitch. The pitch was that the chip owed nobody a license fee to exist.

The claim

The backdrop to that demo is a number the industry has been repeating all year: RISC-V, the open instruction set that started life as a Berkeley teaching project, has crossed 25 percent of the global market and earned a seat as the 'third pillar' of computing next to x86 and ARM^[2]. It's a great headline, but the 25 percent figure is doing a lot of quiet heavy lifting.

Start with who is saying it. The 25 percent figure comes from RISC-V International, the trade body that shepherds the standard, which announced the milestone as running ahead of schedule and backed it with research from the analyst firm SHD Group^[3]. That does not make it wrong, but it does mean the headline was produced by the organization whose entire job is to promote the thing. SHD's own forecast is more careful than the round number suggests, projecting RISC-V chip shipments growing at roughly 47 percent a year toward something like a third of the market and 16 billion units by 2030^[4]. The eye-catching share is measured in units, not dollars, and it is a trajectory as much as a snapshot.

Unit volume is the asterisk that matters most. The bulk of RISC-V's penetration is not laptops or servers. It is tiny embedded cores, many of them buried invisibly inside larger chips where they manage power delivery or shuffle basic I/O, the kind of silicon you already own without knowing it^[5]. Counting those is fair, but it means '25 percent of the market' describes a world where RISC-V is simultaneously everywhere and almost nowhere you can actually see. And by the time the figure had bounced through the content mill, it had curdled into fully automated press releases declaring 'the end of the proprietary duopoly,' bylined to an AI and citing no analyst at all^[6]. Look past the automated hype, and what is left is more modest, and more interesting, than the slop version of it.

Why open silicon matters

Strip away the market math and here is why anyone builds on RISC-V in the first place. An instruction set is the contract between software and the chip that runs it, and for decades that contract came from exactly two places. Intel and AMD own x86. ARM licenses its designs, collects a royalty on every core shipped, and gets a say in who is allowed to build what. RISC-V is a published standard anyone can implement without asking permission or paying a fee^[7]. That is the whole idea, and it is the same idea that made Linux matter: not that it is always better, but that no single company can revoke it, price you out of it, or fold it into a licensing fight you had no part in.

The technically neat part is that it is one family rather than a pile of unrelated chips. The same base design scales from a microcontroller too small to run an operating system up to laptop-class parts, with optional extensions, like the ratified RVV vector instructions for the math AI workloads lean on, layered on top only where they are needed^[8]. A vendor picks the pieces that fit and skips the rest, and code written against the standard extensions travels between them. For anyone who has watched a device get orphaned because its chip vendor lost interest, an architecture nobody can pull out from under you is not an abstraction. It is the difference between hardware you own and hardware you are renting.

The proof of life

That argument only means anything if the hardware actually exists, and this year it walked onstage. The board behind the demo is the DC-ROMA RISC-V Mainboard III^[9], a drop-in replacement for the guts of a Framework Laptop 13. It pairs up to 32 GB of memory with SpacemiT's K3, an eight-core, 2.5 GHz chip that happens to be the first RISC-V part to support the modern RVA23 software profile. That profile matters more than the clock speed. It is the agreement that lets a mainstream Linux distribution and its prebuilt binaries just run, instead of every board needing its own bespoke build. The K3 also carries an on-chip AI accelerator, and in other hands the same silicon has driven demos running 30-billion-parameter models at ten to fifteen tokens a second^[10].

This is precisely what makes the CPU-only run worth dwelling on. The K3's marketed AI muscle lives in that accelerator, not its general-purpose cores, so loading DeepSeek 7B onto the plain CPU was never the fast path, and nobody would put those numbers up against a laptop with a real GPU. That was the flex. The point was not speed, it was that a fully open, repairable laptop could load a modern language model and answer you with no network connection and no proprietary silicon anywhere in the loop, and still have its fast path in reserve. Two years ago that was a slide in a keynote. Now it is a board you can preorder.

The reality check

None of which means you should put your x86 machine on the curb. Desktop-class RISC-V in 2026 is still slow and still rough around the edges. The shipping Linux boards, the StarFive VisionFive 2, the Milk-V Mars, the Banana Pi BPI-F3, land closer to an entry-level ARM single-board computer than to a modern laptop. The fastest way to ruin a weekend is to buy a board whose vendor never got its kernel support merged upstream^[8]. Stick to the mainline-supported chips and the experience is genuinely usable. Wander off them and you inherit an out-of-tree kernel and a forum thread where the manual should be. The software still trails the silicon.

Where RISC-V is actually winning is the unglamorous part of the market the hype tends to skip: embedded controllers, IoT parts, and the long tail of chips where shaving a royalty off every unit is the entire business case^[11]. It is also winning where politics pushes it. China has thrown its weight behind the open standard precisely because it is not American-controlled and cannot be sanctioned away, and its state press now frames RISC-V as a route to semiconductor self-sufficiency^[12]. Read that as strategy rather than a hardware review, but it is strategy with real money and real fabs behind it, and it is a large part of why the shipment curve climbs as steeply as it does.

We have watched a smaller version of this before. When the ArmSoM Sige6 quietly ditched Rockchip for Allwinner, the interesting part was never the chip. It was the crack it opened in a one-vendor corner of the market. RISC-V is that same move at the scale of the whole industry: not a better chip so much as a refusal to let two companies own the ground everything else has to stand on. The 25 percent is softer than the headline, the desktop story is years from comfortable, and the FOSDEM and Summit Europe schedules are still thick with talks about toolchains that do not quite work yet^[13]. But the direction is not really in doubt. An architecture nobody can lock down doesn't have to be the fastest. It just has to be impossible to take away.